512Mb: 32 Meg x 16, 16 Meg x 32 Mobile SDRAM
WRITE Operation
Figure 34: WRITE – DQM Operation
CLK
T0
tCKS
tCKH
tCK
T1
tCL
T2
tCH
T3
T4
T5
T6
T7
CKE
tCMS
tCMH
Command
ACTIVE
NOP
WRITE
NOP
NOP
NOP
NOP
NOP
tCMS tCMH
DQM
tA S
tAH
Address
Row
Column m
tA S
tAH
Enable auto precharge
A10
Row
tA S
tAH
Disable auto precharge
BA0, BA1
Bank
Bank
t DS
tDH
tD S
tDH
t DS
tDH
DQ
D IN m
D IN m + 2
D IN m + 3
tRCD
Note:
1. For this example, BL = 4.
Don’t Care
Burst Read/Single Write
The burst read/single write mode is entered by programming the write burst mode bit
(M9) in the mode register to a 1. In this mode, all WRITE commands result in the access
of a single column location (burst of one), regardless of the programmed burst length.
READ commands access columns according to the programmed burst length and se-
quence, just as in the normal mode of operation (M9 = 0).
PDF: 09005aef8459c827
512mb_mobile_sdram_y67m_at.pdf – Rev. B 3/11 EN
63
Micron Technology, Inc. reserves the right to change products or specifications without notice.
? 2011 Micron Technology, Inc. All rights reserved.
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